Advanced quantum computing-driven digital twin for energy and timing optimization in low-power VLSI circuits &IoT devices
Abstract
The proliferation of Internet of Things (IoT) devices has created a critical demand for highly energy-efficient and timing-accurate Very Large-Scale Integration (VLSI) circuits. Traditional simulation and modeling techniques often fall short in capturing real-time performance metrics, particularly under dynamic operating conditions and process variations. Digital Twin (DT) technology has emerged as a transformative approach, enabling real-time mirroring and prediction of physical systems. However, classical DT frameworks are computationally limited when simulating complex VLSI behaviors involving multiple non-linear interactions and stringent power constraints. To address these challenges, this research proposes a novel quantum computing-enhanced digital twin framework designed for low-power VLSI circuits in IoT applications. The proposed system leverages the computational parallelism and probabilistic modeling capabilities of quantum algorithms to accelerate the simulation and optimization of power and timing metrics. A hybrid quantum-classical architecture is employed, where a quantum variational circuit models the probabilistic switching behavior of logic gates, while classical components handle data acquisition and control operations. Quantum Approximate Optimization Algorithm (QAOA) and Variational Quantum Eigensolver (VQE) are integrated to minimize energy dissipation and optimize timing paths, respectively. Real-time telemetry from IoT hardware is used to continuously…
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