Quantum transport insights into layer-dependent behavior of Sub-1 nm MoS2 transistors for advanced scaling
Abstract
Sub-1 nm gate-length MoS2 field-effect transistors (FETs) have recently been demonstrated experimentally; however, their fundamental performance limits remain unclear. In this work, we investigate the layer-dependent behavior of few-layer MoS2 FETs with an ultra-scaled gate length of 0.3 nm using an ab initio quantum transport framework. Our results show that monolayer MoS2 devices can meet the extended International Technology Roadmap for Semiconductors (ITRS) high-performance (HP) requirements, achieving on-state currents of 453 µA µm-1 and 402 µA µm-1 for n- and p-type devices, respectively. In contrast, device performance degrades significantly with increasing layer number. Bilayer and trilayer MoS2 FETs reach only 52/67% and 19/27% of the ITRS HP on-current targets for n-/p-type configurations, respectively. This degradation is primarily attributed to reduced electrostatic control and changes in electronic structure with increasing thickness. These findings indicate that, under idealized conditions, monolayer MoS2 offers the most promising pathway for continued device scaling toward the sub-1 nm regime, providing important insights into the design of next-generation nanoscale transistors.
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